How To Interpret Register Value In Hex

ECE 3620

Introduction to Microcomputers

� 2005� Prof. Mohamad Hassoun

WSU/ECE

Unit # 1

Microcomputer Execution of Associates Programs: A Brief Overview

Objectives: After completing this unit you should exist able to:

i. Ascertain the following terms: Calculator, processor, microprocessor, memory, retention address, memory content, hardware, software, bit, nibble, byte, word, mnemonic, opcode, educational activity, operation, operand, address bus, data bus, program counter, memory address register, retentivity data annals, instruction register, ALU, accumulator, and addressing mode.

two. Convert betwixt the post-obit data representations: decimal, binary and hexadecimal.

iii. Explain the differences between the firsthand, directly and inherent addressing modes.

4. Disassemble auto lawmaking into mnemonic assembly language instructions.

5. Explicate the microprocessor didactics execution wheel.

6. Employ the HC11 Simulator to enter, gather, and detach programs.

7. Write simple programs (few instructions in length) to perform bones load/shop operations.

This Unit presents an overview of the internal workings of a microprocessor and the way it interacts with memory as information technology executes a elementary depression-level program (machine lawmaking). This module covers the post-obit cloth.

� The key computer

� Data motorbus, address jitney and memory

� The representation of operations and information within a microcomputer: Base-ii numbers , operation codes

� A convenient representation of opcodes and data: The hexadecimal code

� Some bones microprocessor instructions

� Car code of a uncomplicated assembly program

� Car lawmaking inside a microcomputer

� Microprocessor internal registers

� The educational activity execution bike

� An Excel-based microprocessor organization simulator

o Simulator

o Tutorial movie

� Exercises

� Laboratory experiments

The Key Computer

A figurer is fabricated up of hardware and software. The hardware primarily consists of a processor [also called the key processing unit (CPU)] interconnected to memory. Memory is where software (programs and data) is stored. The CPU is connected to memory by means of a prepare of signal lines (conducting wires) referred to as a bus system. The mutual bus arrangement consists of a data jitney, accost bus, and control motorcoach.

A microprocessor is a processor packaged in a single integrated circuit.

A microcomputer is a computer that uses a microprocessor as its CPU.

Data Motorcoach, Address Bus and Retention

The basic unit of information in a computer is called a bit. A single bit can presume ane of 2 values: 0 or i. Therefore, all data inside a calculator is represented by binary codes. The CPU is capable of interpreting/manipulating several $.25 at the same time. The microprocessor we consider in this course uses information in 8-bit groups and is referred to equally an 8-bit microprocessor.

Groups of bits of a item size have special names:

4 bits

1 nibble

(hexadecimal digit)

viii bits

ane byte = 2 nibbles

16 bits

1 word = ii bytes

In an eight-flake microprocessor, all data (numbers, letters, instructions, and other information) are broken downwardly into chunks of one-byte each. For example, the decimal number i is represented every bit 00000001. Such data would commonly be stored in the memory of the microcomputer system, only can also be loaded into ane of the internal microprocessor registers for processing. Therefore, information technology is assumed that all memory storage locations are designed to hold, precisely, i-byte each. Also, the data bus consists of a bundle of viii conducting wires and is designed to move one total byte at a time.

The microprocessor can fetch (load) data from retention. This requires the microprocessor to signal the memory with the precise accost of the data byte it is looking for. The microprocessor system nosotros describe here has a 1-word (16 bits) address bus. This allows the microprocessor to specify whatever one of the 2¹⁶ (65,536) possible retentivity locations. The lowest memory location has the decimal accost �0� and the highest possible memory location has the decimal address �65,535.�

The microprocessor utilizes 2 special internal registers [a program counter (PC) and a memory address register (MAR)] that assistance it indicate to the specific retentivity location it is interested in. These registers are 2-byte registers. For instance, if the microprocessor is about to read the contents of the second memory location (designated by the decimal address �1�), then the MAR content would be set up to 0000000000000001. We use the notation MAR = 0000000000000001 to refer to the contents of MAR. On the other hand, the annotation (0000000000000001) refers to the content of the memory location whose address is represented past the binary string �0000 0000 0000 0001� (note: displaying a binary cord as shown in the above line makes it easier to read).

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Reading from Memory

The following figure illustrates how the microprocessor reads the contents of the second memory location. After loading the 2-byte address onto the address coach, the microprocessor tells the retentiveness to send a copy of the contents of that location. The content of memory (00111010 in this example) is loaded onto the data bus, which in turn eolith its contents into the information annals inside the microprocessor.

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The Representation of Operations and Information Inside a Microcomputer

So far we have seen that all information within a microprocessor system is represented using 1-byte binary strings stored in memory, and 1 or 2-byte strings within the microprocessor. Unremarkably, numbers, letters and instructions accept ane-byte representations. On the other mitt, memory addresses are represented using 1-give-and-take (2-bytes). In the following sections, proper binary codes for representing decimal numbers and instructions are introduced. As well, the hexadecimal code is introduced as an efficient lawmaking for binary information representation.

Representation of Numbers: Base-ii

The following table lists the base-two codes for the integers 0-255. Annotation that the largest decimal value that tin can be represented inside a 1-byte register (or memory location) is 255 (or 2^eight � 1).

Consider a one-byte number and refer to its bits as:��

b ₇ b ₆ b _five b _iv b ₃ b _two b _ane b ₀

Here, b ₀ �is referred to as the least significant fleck (LSB). Similarly, b ₇ is referred to as the nearly pregnant flake (MSB). The subscript is chosen the bit number. The chip number tin be used to generate the decimal equivalent of the corresponding scrap. For example, if b _three = i, then its decimal value is 1twoⁱⁱⁱ = ieight = viii. In general, the decimal equivalent of b_i is b_i *2 ⁱ .

In order to eliminate defoliation, the subscripts �2� and �x� are used in the to a higher place case to indicate base-2 (binary) and� base-10 (decimal) representations, respectively.

�

In the context of data saved in ane-byte memory location or in a ane-byte microprocessor register, the integer 19 is represented as �0001 0011.��

What is the 2-byte representation of the retentiveness accost 3,855₁₀?� Repeat for 49,152₁₀?

Representation of Program Instructions: Opcodes

A estimator program (in assembly language) is made upwardly of a series of instructions. Every didactics consists of an operation and (sometime) an operand. For example, the assembly instruction to load the integer 8 into accumulator A (ACCA) is �LDAA #8.� ACCA is a special i-byte working register located inside the microprocessor. Hither, the abridgement or mnemonic �LDAA� stands for the instruction �load 1-byte into accumulator A.�� The operand #viii represents the data to be loaded. It has two parts: �8� represents a decimal number, and �#� indicates that the value to exist loaded is the designated number. (As we volition run across afterwards, �#� implies that the immediate addressing style is to be used. This is one of several possible addressing modes that are supported).

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Since all information inside a computer must be converted into binary bytes, how does 1 represent operations? The answer is that the designers of the microprocessor have already chosen a set of special binary codes (called opcodes) to represent operations. Most operations utilize a 1-byte code. For instance, the binary code �1000 0110� is the opcode for the LDAA operation. The complete car code for the pedagogy �LDAA #8� are the two consecutive bytes �1000 0110� and �0000 1000.� Note that the machine lawmaking for the integer �8� is just the base-2 representation of �8.� On the other manus, the opcode byte �1000 0110� is adamant by a predefined binary code that has cipher to do with the base-2 representation.

When the �LDAA #8� didactics is saved in memory (as part of a user program), it is actually the respective machine code is what gets saved. In this case, the instruction would occupy 2 consecutive bytes of retentiveness.

A Convenient Representation of Opcodes and Data: The Hexadecimal Code

The binary representations considered above can get very cumbersome even for short programs. The microcomputer has no difficulty interpreting and manipulating the binary motorcar code of a program consisting of several hundred instructions. On the other paw, such a task would be very daunting for the student or programmer. Next, the hexadecimal lawmaking is introduced and is shown to be a relatively efficient code for representing machine language.

Based on the above, it can be hands shown that the hexadecimal representation of the instruction �LDAA #8 is given by the 2 bytes:� 86� 08.

Example: The memory address� 0000 0001 0100 1000_ii has the hex representation: 0148₁₆. We may also use the hex notation $0148 to stand for our respond. This answer can exist broken down to two bytes: The high-byte is $01 and the low-byte is $48.

Notice the hex representation of the memory address 3,855₁₀?� Repeat for 49,152₁₀ and 65,535₁₀. Also, identify the loftier and depression bytes of each hex address.

Some Bones Microprocessor Instructions

The following table lists a few microprocessor operations forth with their hex opcodes.

Mnemonic	Operation	Description	Opcode
LDAA	Load accumulator A	1-byte� � ACCA	86
LDAB	Load accumulator B	1-byte � ACCB	C6
INCA	Increase ACCA	ACCA + 1 � ACCA	4C
ABA	Add together accumulators	ACCA + ACCB � ACCA	1B
STAA	Shop ACCA in memory	ACCA � Memory	97*
STAB	Shop ACCB in memory	ACCB � Memory	D7*
WAI	Wait/Halt		3E

* These opcodes assume that the memory location has a low address which is located in the range $0000-$00FF. Here, the high-byte is ever $00.

Auto Code of a Simple Assembly Program

Consider the Assembly Language program:

LDAA� #1

LDAB� #4

ABA

STAA� $0000

WAI

This program loads ACCA with decimal 1 and ACCB with decimal 4. The prefix # indicates that the operand is itself the data to exist loaded into the accumulator (i.due east., it indicates that the instruction is utilizing the immediate addressing fashion). The tertiary operation adds the contents of the accumulators and saves the effect in ACCA. The fourth didactics saves the contents of ACCA (i.e., 5) in memory at the hex address $0000 (i.eastward., at the kickoff retentivity location). The prefix �$� indicates that the operand is expressed in hexadecimal lawmaking. Since the address is assumed to be 2-bytes long, a 4-digit hex operand is mostly required. Finally, WAI halts the execution; the microprocessor does non proceed to the side by side education. The following table lists the prefix for number representation in assembly code.

Base	Prefix
Hexadecimal	$
Binary	%
Decimal	(nothing)

Employing the table of opcodes presented earlier one can generate the hex machine code (i.e., assemble) for the above simple program every bit shown below.

Associates Code	Car lawmaking (in hex)
LDAA� #1	86� 01
LDAB� #4��	C6� 04
ABA��	1B
STAA� $0000��	97� 00
WAI��	3E��

Note how the offset two instructions resulted in two bytes each (this is a belongings of the immediate addressing mode). The third didactics only required a single byte because there is no demand for an operand (hither, the operand is implied or inherent). The aforementioned applies for the terminal instruction. The STAA instructions would commonly require three bytes of storage: ane for the opcode and two for the address operand. Notwithstanding, this instruction merely required two bytes of machine lawmaking since the address has a $00 high byte; the microprocessor would know to add $00 upon decoding the opcode �$97�. This is a property of direct addressing, and it leads to faster execution. The total number of memory bytes required by the above program is eight.

�Auto Lawmaking Inside a Microcomputer

Another manner of list the auto code for the to a higher place example is

86		LDAA #1
01
C6		LDAB #4
04
1B		ABA
97		STAA $0000
00
3E		WAI

In fact, the left hand side column in the above table represents the mode the machine code is organized (in consecutive locations) in retentiveness upon downloading it to the microprocessor system. However, the actual code in retentiveness is binary and not hex (for united states, the hex code is more than convenient to utilise). Bold that the program is saved in memory starting at the address $C000, and so the actual contents of plan retentivity would exist

Address	Content (hex)
$C000	86
$C001	01
$C002	C6
$C003	04
$C004	1B
$C005	97
$C006	00
$C007	3E

Hither, ($C000) = $86, ($C001) = $01, ($C002) = $C6, etc.

Microprocessor Internal registers

The microprocessor is the control and processing center in a computer. It consists of a control unit, arithmetics and logic unit of measurement (ALU) and registers.� The control unit is responsible for decoding or interpreting the opcodes of instruction. It also provides timing and controls of data flow. The ALU is where arithmetic and logic operations are carried out.

As noted earlier in this Unit, the microprocessor�s registers are needed for handling and manipulating data and addresses. We have already introduced some of these registers earlier: 1-byte working registers (ACCA & ACCB), a 2-byte program counter (PC), a ii-byte retentivity accost register (MAR), and a one-byte memory data register (MDR). A typical microprocessor has additional registers:

� Instruction Register (IR): A 1-byte annals that holds the teaching opcode so that it tin can exist decoded (interpreted) past the control unit of measurement.

� Condition Code (CC) Register: A 1-byte register that keeps rail of certain properties (e.thou., carry, negative issue, zero result, overflow, etc.) of the result of the last instruction executed.

� Stack Arrow (SP): A 2-byte register that establishes a memory stack.

� Index Register (XR): A ii-byte register that is essential for indexed addressing.

The following is a snapshot block diagram of a bones microprocessor (Motorola M6800). Information technology shows that the content of both accumulators is $00, a programme counter pointing to the accost ($C000) of the next byte of program to exist fetched from memory, and a condition code register that has all flags reset (set to zero).

The Educational activity Execution Cycle

A microprocessor executes a program stored in memory one educational activity at a time. The microprocessor needs to load all machine code bytes associated with a given instruction from memory before it can execute that particular instruction. The complete process tin exist cleaved down into the post-obit steps: Fetch opcode, decode opcode, fetch additional bytes (addresses and/or information), and so execute the instruction. In the following, the elementary addition case considered before will be used to illustrate the mode a microprocessor executes instructions.

Address	Content (hex)
$C000	86
$C001	01
$C002	C6
$C003	04
$C004	1B
$C005	97
$C006	00
$C007	3E

The higher up table shows the machine lawmaking of a uncomplicated program that starts at memory location $C000. Before execution can start, the starting address of the program must be placed in the program counter (i.e., PC = $C000).� The step-past-step execution of the first program pedagogy LDAA #i and the last instruction STAA $00 are described next.

Step 1�

a. �� The contents of the PC are sent to the memory address register (MAR).

b. �� The microprocessor provides this address to the retention (via the address autobus) and read back (via the data bus) its content, $86.

c. �� Considering this is an instruction fetch (why? Because the microprocessor is designed to interpret the offset byte of code it fetches equally an opcode), the opcode is placed in the instruction register (IR).

d. �� The control unit has an teaching decoder that decodes 86 equally the opcode for a �load accumulator A from the side by side memory location� instruction. Here, the microprocessor increments its PC.

Step 2 �

a. �� The PC has been incremented in Stride 1. Its new content, C001 is sent to the MAR.

b. �� The microprocessor reads $01 (via the data bus) into the MDR. The teaching is completed by copying the MDR content into ACCA.

c. �� The PC is incremented to $C002.

d. �� The contents (flags) of the status code registers are as well updated to reflect the nature of the number loaded in ACCA (this will be discussed afterwards).

Information technology took two read cycles in lodge to complete the execution of the LDAA instruction (in firsthand addressing style). At this bespeak, the PC has the address of the opcode of the side by side education and the microprocessor is ready to execute such instruction.

The following diagram depicts the contents of the microprocessor registers at the instant merely after completing the ABA pedagogy.

The following prepare of diagrams are snapshots of the microprocessor state every bit it handles the STAA $00 instruction.

a. Opcode is fetched and decoded and PC incremented.

b. Lower byte of address is read and placed in a temporary annals.

c. The opcode $97 also instructs the microprocessor to insert a $00 as the loftier byte in the property register. This 2-byte data is then copied into the MAR.

d.�� The contents of ACCA are copied into MDR and then transported past the data motorbus and saved in memory at the address $0000 pointed to by the MAR. At present, the processor is ready to execute the educational activity starting at the address pointed to past the but incremented PC.

An Excel-Based Microprocessor System Simulator

My educatee, Dave Conger, has written a user-friendly microprocessor simulator. He started it as a projection in ECE2620 (fall 04) and then completed information technology in the winter/spring of 2005 (project was funded past a WSU grant). The simulator runs under Microsoft�s Excel. The simulator has a built-in assembler and disassembler.

Download the simulator

Sentry a motion picture tutorial for the simulator

Exercises

Laboratory Experiments